Near field RFID system with multiple reader coils

ABSTRACT

A near field RFID system includes an RFID reader and an RFID tag. The RFID reader includes a transmit path and a receive path, wherein the transmit path includes: an encoding section coupled to convert data into encoded data; a digital to analog conversion module coupled to convert the encoded data into an analog encoded signal; a power amplifier coupled to amplify the analog encoded signal; and a plurality of coils coupled to generate a plurality of electromagnetic fields from the analog encoded signal. The RFID tag that includes: a coil coupled to generate a current and a recovered signal from at least one of the plurality of electromagnetic fields; a power recovery circuit coupled to generate a voltage from the current; and a data processing section coupled to process the recovered signal, wherein the data processing section is powered via the voltage.

This patent application is claiming priority under 35 USC §119 to aprovisionally filed patent application entitled NEAR FIELD RFID SYSTEMWITH MULTIPLE READER COILS, having a provisional filing date of Jan. 16,2007, and a provisional Ser. No. of 60/880,592 and is further claimingpriority under 35 USC §120 as a continuation-in-part patent applicationof co-pending patent application entitled DECODING OF BI-PHASE ENCODEDDATA, having a filing date of Jan. 26, 2006, and a Ser. No. of11/340,243; of co-pending patent application entitled POWER GENERATINGCIRCUIT, having a filing date of Mar. 31, 2006, and a Ser. No. of11/394,808; and of co-pending patent application entitled HYBRIDON-CHIP-OFF-CHIP TRANSFORMER, having a filing date of Sep. 28, 2006, anda Ser. No. of 11/529,055.

CROSS REFERENCE TO RELATED PATENTS

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STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

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INCORPORATION-BY-REFERENCE OF MATERIAL SUBMITTED ON A COMPACT DISC

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BACKGROUND OF THE INVENTION

1. Technical Field of the Invention

This invention relates generally to communication systems and moreparticularly to a transformer that may be used in such communicationsystems.

2. Description of Related Art

Communication systems are known to support wireless and wire linedcommunications between wireless and/or wire lined communication devices.Such communication systems range from national and/or internationalcellular telephone systems to the Internet to point-to-point in-homewireless networks. Each type of communication system is constructed, andhence operates, in accordance with one or more communication standards.For instance, wireless communication systems may operate in accordancewith one or more standards including, but not limited to, IEEE 802.11,Bluetooth, advanced mobile phone services (AMPS), digital AMPS, globalsystem for mobile communications (GSM), code division multiple access(CDMA), local multi-point distribution systems (LMDS),multi-channel-multi-point distribution systems (MMDS), radio frequencyidentification (RFID), and/or variations thereof.

Depending on the type of wireless communication system, a wirelesscommunication device, such as a cellular telephone, two-way radio,personal digital assistant (PDA), personal computer (PC), laptopcomputer, home entertainment equipment, RFID reader, RFID tag, et ceteracommunicates directly or indirectly with other wireless communicationdevices. For direct communications (also known as point-to-pointcommunications), the participating wireless communication devices tunetheir receivers and transmitters to the same channel or channels (e.g.,one of the plurality of radio frequency (RF) carriers of the wirelesscommunication system or a particular RF frequency for some systems) andcommunicate over that channel(s). For indirect wireless communications,each wireless communication device communicates directly with anassociated base station (e.g., for cellular services) and/or anassociated access point (e.g., for an in-home or in-building wirelessnetwork) via an assigned channel. To complete a communication connectionbetween the wireless communication devices, the associated base stationsand/or associated access points communicate with each other directly,via a system controller, via the public switch telephone network, viathe Internet, and/or via some other wide area network.

For each wireless communication device to participate in wirelesscommunications, it includes a built-in radio transceiver (i.e., receiverand transmitter) or is coupled to an associated radio transceiver (e.g.,a station for in-home and/or in-building wireless communicationnetworks, RF modem, etc.). As is known, the receiver is coupled to theantenna and includes a low noise amplifier, one or more intermediatefrequency stages, a filtering stage, and a data recovery stage. The lownoise amplifier receives inbound RF signals via the antenna andamplifies then. The one or more intermediate frequency stages mix theamplified RF signals with one or more local oscillations to convert theamplified RF signal into baseband signals or intermediate frequency (IF)signals. The filtering stage filters the baseband signals or the IFsignals to attenuate unwanted out of band signals to produce filteredsignals. The data recovery stage recovers raw data from the filteredsignals in accordance with the particular wireless communicationstandard.

As is also known, the transmitter includes a data modulation stage, oneor more intermediate frequency stages, and a power amplifier. The datamodulation stage converts raw data into baseband signals in accordancewith a particular wireless communication standard. The one or moreintermediate frequency stages mix the baseband signals with one or morelocal oscillations to produce RF signals. The power amplifier amplifiesthe RF signals prior to transmission via an antenna.

In many wireless communication devices, the transmitter and/or receiveris coupled to antenna, or antennas, by one or more transformers. Such atransformer typically includes a single-ended winding that is coupled tothe antenna and a differential winding that is coupled to a low noiseamplifier of a receiver section and/or to a power amplifier of atransmitter section. The transformer may be implemented in a variety ofways. For instance, the transformer may be implemented on-chip with thereceiver and/or transmitter section. While an on-chip transformerprovides the convenience of not requiring an external transformer, theon-chip transformer's power capabilities are limited due to its size.

Another known implementation of a transformer is a marginal typetransformer that is fabricated on a printed circuit board (PCB). Amarginal type transformer includes two parallel traces that each isapproximately one-quarter wavelength in length. As such, a margin typetransformer consumes a significant amount of PCB real estate, but doesprovide significant power in comparison to the on-chip transformer. Aswith any transformer, impedance matching between the antenna andreceiver or transmitter section is an important design criterion.

In RFID systems, the cost and the size of the tag and the ability toprovide secure communication between the reader and the tag are criticaldesign challenges. The reduction of the cost and the size of the tag inexisting RFID systems, however are primarily limited to the design andimplementation of passive components, i.e. bulky antenna or couplingcoil that can not be integrated on-chip. In addition, the use of complexdata encryption algorithms, for security, requires a lot of powerconsumption and therefore, is not practical for extremely low-powerpassive tags.

Therefore, a need exists for a size, cost, and/or performance efficientRFID system.

BRIEF SUMMARY OF THE INVENTION

The present invention is directed to apparatus and methods of operationthat are further described in the following Brief Description of theDrawings, the Detailed Description of the Invention, and the claims.Other features and advantages of the present invention will becomeapparent from the following detailed description of the invention madewith reference to the accompanying drawings.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING(S)

FIG. 1 is a schematic block diagram of an embodiment of a radiofrequency identification (RFID) system in accordance with the presentinvention;

FIG. 2 is a schematic block diagram of an embodiment of a hybridon-chip-off-chip transformer in accordance with the present invention;

FIG. 3 is a schematic block diagram of an embodiment of an RFID readerin accordance with the present invention;

FIG. 4 is a schematic block diagram of an embodiment of an RFID tag inaccordance with the present invention;

FIG. 5 is a schematic block diagram of an embodiment of an RFID readerand RFID tag in accordance with the present invention;

FIG. 6 is diagram of an embodiment of a coil of an RFID tag inaccordance with the present invention;

FIG. 7 is a diagram of frequency and/or time diversity schemes inaccordance with the present invention; and

FIG. 8 is a schematic block diagram of an embodiment of a plurality ofcoils of an RFID reader in accordance with the present invention.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 is a schematic block diagram of an RFID (radio frequencyidentification) system that includes a computer/server 12, a pluralityof RFID readers 14-18 and a plurality of RFID tags 20-30. The RFID tags20-30 may each be associated with a particular object for a variety ofpurposes including, but not limited to, tracking inventory, trackingstatus, location determination, assembly progress, et cetera.

Each RFID reader 14-18 wirelessly communicates with one or more RFIDtags 20-30 within its coverage area. For example, RFID reader 14 mayhave RFID tags 20 and 22 within its coverage area, while RFID reader 16has RFID tags 24 and 26, and RFID reader 18 has RFID tags 28 and 30within its coverage area. The RF communication scheme between the RFIDreaders 14-18 and RFID tags 20-30 may be a backscattering techniquewhereby the RFID readers 14-18 provide energy to the RFID tags via an RFsignal. The RFID tags derive power from the RF signal and respond on thesame RF carrier frequency with the requested data.

In this manner, the RFID readers 14-18 collect data as may be requestedfrom the computer/server 12 from each of the RFID tags 20-30 within itscoverage area. The collected data is then conveyed to computer/server 12via the wired or wireless connection 32 and/or via the peer-to-peercommunication 34. In addition, and/or in the alternative, thecomputer/server 12 may provide data to one or more of the RFID tags20-30 via the associated RFID reader 14-18. Such downloaded informationis application dependent and may vary greatly. Upon receiving thedownloaded data, the RFID tag would store the data in a non-volatilememory.

As indicated above, the RFID readers 14-18 may optionally communicate ona peer-to-peer basis such that each RFID reader does not need a separatewired or wireless connection 32 to the computer/server 12. For example,RFID reader 14 and RFID reader 16 may communicate on a peer-to-peerbasis utilizing a back scatter technique, a wireless LAN technique,and/or any other wireless communication technique. In this instance,RFID reader 16 may not include a wired or wireless connection 32 tocomputer/server 12. Communications between RFID reader 16 andcomputer/server 12 are conveyed through RFID reader 14 and the wired orwireless connection 32, which may be any one of a plurality of wiredstandards (e.g., Ethernet, fire wire, et cetera) and/or wirelesscommunication standards (e.g., IEEE 802.11x, Bluetooth, et cetera).

As one of ordinary skill in the art will appreciate, the RFID system ofFIG. 1 may be expanded to include a multitude of RFID readers 14-18distributed throughout a desired location (for example, a building,office site, et cetera) where the RFID tags may be associated withequipment, inventory, personnel, et cetera. Note that thecomputer/server 12 may be coupled to another server and/or networkconnection to provide wide area network coverage.

FIG. 2 is a schematic block diagram of a hybrid on-chip-off-chiptransformer 40 that includes an off-chip winding section 42 and anon-chip winding section 44. The off-chip winding section 42 may beincluded in an RFID reader 14 and the on-chip winding section 44 may beon a tag integrated circuit (IC) 50 of and RFID tag 20.

The off-chip winding section 42 is coupled to produce a firstelectromagnetic signal from a reference source, which may be an RFIDreader integrated circuit 46. The on-chip winding section 44 is coupledto derive a second electromagnetic signal from the first electromagneticsignal when the on-chip winding section 44 is within a proximal couplingdistance of the off-chip winding section 42.

In addition, the on-chip winding section 44 is coupled to produce thesecond electromagnetic signal from a second reference source, which maybe tag processing circuitry 52 of the tag IC 50. The off-chip windingsection 42 is coupled to derive the first electromagnetic signal fromthe second electromagnetic signal when the on-chip winding section 44 iswithin a proximal coupling distance of the off-chip winding section 42.Accordingly, the RFID tag 20 may communicate with the RFID reader 14 viathe hybrid on-chip-off-chip transformer 40.

FIG. 3 is a schematic block diagram of an RFID reader 14-18 thatincludes an integrated circuit 46, the off-chip winding section 42, andmay further include a local area network (LAN) connection module 64. Theintegrated circuit 46 includes protocol processing module 60, anencoding module 62, a digital-to-analog converter (DAC) 64, a transmitblocking circuit 74, a digitization module 68, and a decoding subsystem,which includes a pre-decode module 70 and a decode module 72. The localarea network connection module 64 may include one or more of a wirelessnetwork interface (e.g., 802.11n.x, Bluetooth, et cetera) and/or a wiredcommunication interface (e.g., Ethernet, fire wire, et cetera).

The protocol processing module 60 is coupled to prepare data forencoding via the encoding module 62 which may perform a data encoding inaccordance with one or more RFID standardized protocols. The encodeddata is provided to the digital-to-analog converter 64 which convertsthe digitally encoded data into an analog signal. The off-chip windingsection 42 is coupled to receive the analog signal and to producetherefrom the first electromagnetic signal.

The transmit (TX) blocking circuit 74 blocks energy of the transmitsignal such that it does not substantially interfere with the receivingof a response signal received from one or more RFID tags. For a receivedresponse signal, the digitization module 48, which may be a limitingmodule or an analog-to-digital converter, converts the received responsesignal into a digital signal. The pre-decode module 50 converts thedigital signal into a biphase encoded signal or mixed signal inaccordance with the particular RFID protocol being utilized. The biphaseencoded or mixed signal is provided to the decoding module 52, whichrecaptures data therefrom in accordance with the particular encodingscheme of the selected RFID protocol. The protocol processing module 40provides the recovered data to the server and/or computer via the localarea network connection module 54. As one of ordinary skill in the artwill appreciate, the RFID protocols (such as EPC class 0, EPC class 1,EPC Class 1 Gen 2, ISO 18000-6, etc.) utilize one or more of lineencoding schemes such as Manchester encoding, FM0 encoding, FM1encoding, four-interval bit cell encoding, etc.

FIG. 4 is a schematic block diagram of the tag IC 50 of an RFID tag20-30. The tag IC 50 includes the on-chip winding section 44 and the tagprocessing circuitry 52. The tag processing circuitry 52 includes apower generating circuit 80, a current reference 84, an oscillationmodule 86, a processing module 94, an oscillation calibration module 92,a comparator 90, an envelope detection module 88, and transmit couplingcircuitry 82. The current reference 84, the oscillation module 86, theprocessing module 94, the oscillation calibration module 92, thecomparator 90, and the envelope detection module 88 may be a singleprocessing device or a plurality of processing devices. Such aprocessing device may be a microprocessor, micro-controller, digitalsignal processor, microcomputer, central processing unit, fieldprogrammable gate array, programmable logic device, state machine, logiccircuitry, analog circuitry, digital circuitry, and/or any device thatmanipulates signals (analog and/or digital) based on hard coding of thecircuitry and/or operational instructions. One or more of the modulesmay have an associated memory element, which may be a single memorydevice, a plurality of memory devices, and/or embedded circuitry of themodule. Such a memory device may be a read-only memory, random accessmemory, volatile memory, non-volatile memory, static memory, dynamicmemory, flash memory, cache memory, and/or any device that storesdigital information. Note that when the module implements one or more ofits functions via a state machine, analog circuitry, digital circuitry,and/or logic circuitry, the memory element storing the correspondingoperational instructions may be embedded within, or external to, thecircuitry comprising the state machine, analog circuitry, digitalcircuitry, and/or logic circuitry. Further note that, the memory elementstores, and the module executes, hard coded and/or operationalinstructions corresponding to at least some of the steps and/orfunctions illustrated in this FIG. 4.

In operation, the power generating circuit 80 generates a supply voltage(V_(DD)) from the signal provided by the on-chip winding section 44. Forexample, the on-chip winding section 44 receives an electromagneticsignal from the off-chip winding section 42, which produces a voltageacross the terminals of the on-chip winding section 44. The powergenerating circuit 40 uses the voltage of the on-chip winding section 40to produce the supply voltage V_(DD), which is stored in capacitor C1.

When the supply voltage V_(DD) is present, the envelope detection module88 determines an envelope of the signal provided by the on-chip windingsection 44, which may include a DC component corresponding to the supplyvoltage V_(DD). In one embodiment, the signal provided by the on-chipwinding section 44 is an amplitude modulation signal, where the envelopeof the signal includes transmitted data. The envelope detection module88 provides an envelope signal to the comparator 90. The comparator 90compares the envelope signal with a threshold to produce a stream ofrecovered data.

The oscillation module 86, which may be a ring oscillator, crystaloscillator, or timing circuit, generates one or more clock signals thathave a rate corresponding to the rate of the signal provided by theon-chip winding section 44 in accordance with an oscillation feedbacksignal. For instance, if the signal is a 20 MHz signal, the rate of theclock signals will be n*20 MHz, where “n” is equal to or greater than 1.

The oscillation calibration module 92 produces the oscillation feedbacksignal from a clock signal of the one or more clock signals and thestream of recovered data. In general, the oscillation calibration module92 compares the rate of the clock signal with the rate of the stream ofrecovered data. Based on this comparison, the oscillation calibrationmodule 92 generates the oscillation feedback to indicate to theoscillation module 86 to maintain the current rate, speed up the currentrate, or slow down the current rate.

The processing module 94 receives the stream of recovered data and aclock signal of the one or more clock signals. The processing module 94interprets the stream of recovered data to determine a command orcommands contained therein. The command may be to store data, updatedata, reply with stored data, verify command compliance,acknowledgement, etc. If the command(s) requires a response, theprocessing module 94 provides a response signal to the transmit couplingcircuitry 82 at a rate corresponding to the electromagnetic couplingbetween the on-chip winding section 44 and the off-chip winding section42. The on-chip winding section 44 provides the response signal to theoff-chip winding section 42 of the RFID reader 14.

The RFID tag 20-30 may further include the current reference 84 thatprovides one or more reference, or bias, currents to the oscillationmodule 86, the oscillation calibration module 92, the envelope detectionmodule 88, and the comparator 90. The bias current may be adjusted toprovide a desired level of biasing for each of the modules 86, 88, 90,and 92.

FIG. 5 is a schematic block diagram of an embodiment of an RFID reader14 and an RFID tag 20. The RFID reader 14 includes the reader integratedcircuit 46 and a reader winding section 100. The RFID tag 20 includes atag integrated circuit 50 that includes tag processing circuitry 52 andan on-chip winding section 44. Note that the reader winding section 100may be on the same chip as the reader integrated circuit 46, on adifferent chip, and/or on a board supporting the reader integratedcircuit 46.

In this embodiment, the reader winding section 42 includes a pluralityof coils to produce a plurality of electromagnetic fields from anencoded signal provided by the RFID reader integrated circuit 46. Whenthe on-chip winding section 44 is proximal to the reader winding section42 (e.g., within a centimeter), it generates a current and a recoveredfrom at least one of the plurality of electromagnetic fields.

In addition, the on-chip winding section 44 is coupled to produce anoutbound electromagnetic field from a signal provided by the tagprocessing circuitry 52 of the tag IC 50. The reader winding section 100derives a recovered signal from the second electromagnetic signal whenthe on-chip winding section 44 is within a proximal coupling distance ofthe off-chip winding section 42. The reader integrated circuit 46processes the recovered signal to produce inbound data.

The fully integrated RFID tag as previously described overcomes severalissues. First, on chip integration of the tag's coil results inreduction of its quality factor, which is mainly due to high resistanceof metal traces as well as loss of the substrate. The second problemarises in that the mutual inductance between the reader's and the tag'scoils is proportional to the area of the tag's antenna. This affectsvalues of the transimpedance and the modulation impedance.

The fully integrated RFID tag overcomes these issues by operating athigh frequency ranges, which increases the quality factor and affectsthe mutual inductance by limiting the maximum radius of the reader'scoil due to its self resonance frequency. In addition, thetransimpedance and the modulation impedance of the system are functionsof the operational frequency. Note that the mutual inductance of thesystem is increased by reducing the reader to tag distance.

Thus, by properly scaling system parameters, i.e. operational frequencyand reader to tag distance, the tag's antenna or coil can be fullyintegrated. For instance, an approximation of the self-inductance of acircular conductor loop is given by [x],L≅μ ₀ ·N ² ·r _(av)·ln(2r _(av)/α)where r_(av) is the average radius of the loop and α is the differenceof the outer radius and inner radius of the coil. As a roughapproximation, the value of the inductor can be considered to beproportional to the radius of the loop. On the other hand, the parasiticseries resistance of the inductor is proportional to the length of theconductor and is proportional to r_(av) [x]. Therefore, the qualityfactor of the inductor can be written as:$Q = {\frac{\omega_{0} \cdot L}{r_{series}} \propto \omega_{0}}$where r_(series) is the series resistance of the inductor. As a result,by scaling up the operational frequency, the quality factor of theon-chip tag's coil is increased linearly.

In addition, the effect of increasing the operational frequency on themutual inductance should be determined. For this, assume that the readerto tag distance is much higher than the radius of the reader's coil andthat the maximum mutual inductance is achieved when the area of thereader's coil is maximized. As the radius of reader's coil increases,the values of the self-inductance of the coil as well as the parasiticcapacitances are increased. The capacitance of the loop is proportionalto the length of the conductor, which is proportional to the peripheralof the loop. The self-inductance of the coil is approximatelyproportional to the radius of the loop. Therefore, the self resonancefrequency of the loop can be expressed as:ω_(self)=(L·C _(par))^(−1/2) ∝r _(av) ⁻¹where L is the inductance, C_(par) is the parasitic capacitance andr_(av) is the average radius of the coil. Since the operationalfrequency of the circuit should be higher than the self resonantfrequency, the maximum radius of the reader's coil happens when the selfresonance is almost equal to the frequency of operation. Therefore, therelation between the maximum size of the reader's coil and theoperational frequency is given by,$r_{{reader},\max} \propto {\frac{1}{\omega_{0}}.}$

Assuming d>>r₁=r_(reader,max), the relation between the mutualinductance and the operational frequency can be found to be:${M_{12}(d)} = {\frac{\mu_{0} \cdot N_{1} \cdot N_{2} \cdot r_{{reader},\max}^{2} \cdot A_{Tag}}{2 \cdot d^{3}} \propto {\omega_{0}^{- 2} \cdot A_{Tag}}}$where A_(Tag) is the area of the transponder's coil. As a result, themutual inductance is scaled down by the square value of the frequency.From the above, it is assumed that the distance between the reader andthe coil is constant while the frequency of the system is increased.However, the radius of the reader is scaled down by the frequency ofoperation and therefore, the ratio of distance to radius of the reader'scoil is changed. A better comparison can be performed by expressing themutual inductance M₁₂ as a function of the normalized distance which isdefined as, $d_{norm} = \frac{d}{r_{{reader},\max}}$

For a fixed normalized distance d_(norm), the actual reader to tagdistance is scaled by a factor of ω₀ ⁻¹, which yields:${M_{12}\left( d_{norm} \right)} = {\frac{\mu_{0} \cdot N_{1} \cdot N_{2} \cdot A_{Tag}}{2 \cdot r_{{reader},\max} \cdot \sqrt{\left( {1 + d_{norm}^{2}} \right)^{2}}} \propto {\omega_{0} \cdot A_{Tag}}}$indicating that, for a fixed normalized distance, the mutual inductancelinearly increases by increasing the frequency of operation.

For a fixed reader to tag distance, the effect of increasing theoperational frequency on Z₁₂ can be expressed as:Z ₁₂(ω₀)|_(d=d) ₀ _(>>η) ∝ A _(Tag),which indicates that the transimpedance is proportional to the area ofthe transponder's coil. However, it is assumed that the radius of thereader's coil is scaled down by frequency of operation because its selfresonance frequency. Expressing M₁₂ as a function of the normalizeddistance, the relation between the transimpedance and operationfrequency, for a fixed normalized distance, is given by,Z ₁₂(ω₀)|_(d=d) _(norm) ∝ ω₀ ³ ·A _(Tag).

In addition, the relation between the modulation impedance Z_(mod) andthe frequency of operation can be expressed as, for a fixed actualdistance and for a fixed normalized distance, respectively, as:Z _(mod)(ω₀)|_(d=d) ₀ _(>>η) ∝ ω₀ ⁻¹ ·A _(Tag) ²Z _(mod)(ω₀)|_(d=d) _(norm) ∝ ω₀ ⁴ ·A _(Tag) ²

As calculated for the reader's coil, the maximum radius of thetransponder's coil is also limited to its self-resonance frequency andis proportional to ω₀ ⁻¹. Therefore, for a fixed reader to tag distance,it is concluded that Z₁₂ and Z_(mod) are decreased by increasing theoperational frequency by factor of ω₀ ⁻² and ω₀ ⁻⁵ respectively. Thesudden decrease of Z₁₂ and Z_(mod) prevents any spying on the system,especially for the tag to reader communication.

In addition, for a fixed normalized distance, Z₁₂ and Z_(mod) areincreased by increasing the operational frequency. Assuming the RFIDsystem requires Z₁₂ and Z_(mod) to be higher than specific numbers,increasing the operational frequency enables the reduction of the areaof the tag's coil at least by a factor of ω₀ ⁻². In this case, themaximum reader to tag distance that can be covered by the system is alsoscaled down by a factor of ω₀ ⁻¹.

FIG. 6 is diagram of an embodiment of a coil of an RFID tag thatoccupies an area of 550 μm×550 μm in 0.18 CMOS process. The tag coilconsists of 5 inductors in series. Each inductor fabricated in one ofmetal layers 6 to 2 and contains two turns. To achieve the maximumsensitivity, the radius of the coil as well as its number of turns hasto be as high as possible. The limiting factor, however, is the selfresonance frequency of the inductor that should be higher than thefrequency of operation. In addition, the quality factor of the on-chipcoil drops by increasing its size mainly due to the ohmic loss of themetal traces as well as the loss of the substrate. The value of thedesigned inductor is 56.6 nH with the self-resonance frequency ofslightly lower than 900 MHz which is the limit for the value of theinductor. The equivalent circuit of the inductor is also shown in FIG.6. As shown, the tag's coil is designed as a single ended inductor.However, using differential inductor may increase the sensitivity of thecircuit since it enables a higher inductance. In this case, the powerrecovery should be designed differentially to generate both negative andpositive supply voltages.

The power amplifier of the RF front-end of the RFID reader includes adigital to RF configuration. In this structure, a tail current source issimilar to a digital to analog converter that generates a current basedon the digital inputs [B₀ . . . B_(N)] which is given by,I _(B) =I _(ref)(B ₀×2⁰ +B ₁×2¹ + . . . +B _(N−1)×2^(N−1)).

In the above equation, I_(ref) is the reference current of the D/Aconverter. The current is up-converted to the frequency of operation byapplying the output of the local frequency generator to transistors. Forthe reader to tag communication, the reader is required to modulate thecurrent amplitude which induces a voltage over the transponder's coildue to the transimpedance Z₁₂. The modulation can be performed by usingeither reference current I_(ref) or digital inputs [B₀ . . . B_(N)]. Inone embodiment, the tag to reader modulation is performed through thedigital inputs of the tail current source. In an embodiment, the poweramplifier employs 8-bits D/A structure with maximum bias current of 500mA. Using 4 MSB bits as current control bits and 4 LSB bits to adjustthe resolution, the current can be controlled in a range of 4×20log(2)=24 dB with the resolution of 20 log( 15/16)≈0.5 dB.

In general, the bandwidth of the amplitude modulation data is much lowerthan the LO frequency and therefore, it can be considered constant inone switching period of the circuit. The switching behavior of the inputtransistors causes the voltage variation over the tail current sourcewith twice the switching frequency. This generates even harmonics of ω₀in the bias current of the circuit due to finite output impedance of thetail current source. The bias current of the circuit can be expressedas:${{I_{B}(t)} = {I_{B\quad 0} + {\sum\limits_{{n = 2},4,6,\ldots}{I_{n}{\sin\left( {{n\quad\omega_{0}t} + {n\quad\theta_{0}}} \right)}}}}},$where θ₀ is the initial phase of the LO signal, I_(B0) is the currentgenerated proportional to the amplitude of the output signal and I_(n)'sare even harmonic terms of the bias current. In the rest of the paper,the initial phase of the LO, θ₀, is assumed to be zero. The generatedcurrent is sampled at the frequency of ω₀ by using switchingtransistors. Due to the symmetrical nature of the circuit, the currentwaveforms of two switching transistors are similar, with 180° phasedifference. Therefore, the Fourier series of i_(M1)(t) and i_(M2)(t) canbe expressed as,${i_{M\quad 1}(t)} = {\frac{I_{B\quad 0}}{2} + {\sum\limits_{n = 1}^{n = \infty}{a_{n}{\sin\left( {n\quad\omega_{0}t} \right)}}}}$${i_{M\quad 2}(t)} = {\frac{I_{B\quad 0}}{2} + {\sum\limits_{n = 1}^{n = \infty}{a_{n}{\sin\left( {{n\quad\omega_{0}t} + {n\quad\pi}} \right)}}}}$

These equations indicate that even harmonics are equal in both i_(M1)(t)and i_(M2)(t) while odd harmonics have opposite polarity with the samemagnitude. By choosing proper device sizes, the current waveformsi_(M1)(t) and i_(M2)(t) are defined as the multiplication result of thebias current I_(B)(t), and a square wave with 50% duty cycle. Therefore,the Fourier coefficients of i_(M1)(t) and i_(M2)(t) can be expressed as:$a_{n} = \left\{ \begin{matrix}\frac{I_{n}}{2} & {{n = 2},4,6,{\ldots({even})}} \\{{\frac{2}{n\quad\pi}I_{B\quad 0}} + {\sum\limits_{{{m \pm k}} = n}\frac{I_{m}}{k\quad\pi}}} & {{n = 1},3,5,{\ldots({odd})}}\end{matrix} \right.$where I_(n)'s are the amplitude of the even harmonic terms of the biascurrent. In a properly designed circuit, the even harmonics are smallcompare to the dc current so that I_(n)/I_(B0)<<1 (for n=2,4, . . . ).Therefore, the amplitude of the fundamental component of the currentwaveforms i_(M1)(t) and i_(M2)(t) can be approximated as 2I_(B0)/π.

The power amplifier delivers a high current to the reader's coil whichprovides for a strong magnetic field and increases the system'ssensitivity. Due to the limited breakdown voltage of MOSFET devices, theimpedance of the output network needs to be low to prevent high voltageswing at the output.

In order to obtain a low voltage swing at the output of the poweramplifier, the output network is designed so that it introduces a lowimpedance load to the first and second harmonics of ω₀. The higherharmonics of the current are assumed to be rejected by shunt LCnetworks, which also provide the bias current of the circuit. Accordingto the above equations, the even harmonic terms of i_(M1)(t) andi_(M2)(t) are equal and their odd harmonic terms have the same magnitudewith opposite polarity. As a result, the first harmonic components areapplied to the output network as differential signal while the secondharmonic terms are applied as common mode.

Since the first harmonic is applied differentially to the circuit, nodeA acts as a virtual ground at that frequency. On the other hand, thesecond harmonic is applied as a common mode signal and therefore, itdoubles the effective impedance from node A to ground at each halfcircuit. As a result, the effective capacitance from node A to ground isdivided by 2 in each half circuit of 2ω₀. To minimize the impedance atthe output of the PA, the series combination of L₁ and C₁ shouldresonate at ω₀ and the series combination of L₁, C₁ and 0.5C₂ shouldresonate at 2ω₀. Therefore,${\omega_{0} = \frac{1}{\sqrt{L_{1} \cdot C_{1}}}},{{2\omega_{0}} = {\left( {L_{1} \cdot \frac{C_{1} \cdot C_{2}}{{2C_{1}} + C_{2}}} \right)^{{- 1}/2}.}}$

Using these equations, the value of the tuning capacitors are definedas, C₁=(ω₀L₁)⁻¹ and C₂=(⅔)×C₁. In another embodiment, the reader's coilmay be fabricated on PCB board with the value of 30 nH and the Q of 55.The shape of the reader's coils is a 5 mm×5 mm square and it contains 4turns. In this embodiment, the mutual inductance between the reader'sand the tag's coils, for d=5 mm, is roughly 0.2 nH. The reader's andtag's coils are approximated to be circular such that, for dc current of500 mA that produces a 318 mA AC current in the reader's coil, thevoltage swing at the tag's input is almost 0.3V. In an embodiment, thepower recover circuit of the RFID tag converts this voltage into a 1Vsupply voltage having a load current of 10 μA.

In a near field RFID system, the maximum coupling between the reader andthe transponder can be achieved when the tag's and the reader's coilsare placed on top of each other. Misalignment of these two results inthe sensitivity degradation of the system. This becomes more criticalwhen the operational frequency is increased which results in the smallerreader's coil and therefore a sharper magnetic field.

To increase the area in which the reader can detect a tag, the readerincludes multiple coils, where each coil covers a portion of the totalarea. To drive multiple reader coils and avoid adjacent coils cancelingeach others electromagnetic field, adjacent coils should operate eitherat different frequency (e.g., frequency diversity) and/or at differenttime frames (e.g., time diversity). Any combination of these two methodsis also possible as shown FIG. 7.

As show in FIG. 7, the reader employs four different frequencies inorder to prevent any flux cancellation due to adjacent coils. The systemrequired four power amplifiers that each PA operates at one of thefrequencies f₁ to f₄. However, the coils with the same operationalfrequency and different time frames can be driven by one poweramplifier. For this purpose, the output current of the PA should beswitched between different coils. FIG. 8 illustrates an embodiment ofthe power amplifier configured to turn on/off each coil by using cascodetransistors.

In this embodiment, the current is directed to the i^(th) coil by havingA_(i) equal to V_(DD) and all other control bits equal to zero. Byproperly switching the PA's output, the reader can extend its coveragearea.

Note that in the example of FIG. 7, the magnetic flux of the tag is maybe up of a weighted summation of the magnetic field of all coilsdepending on the position of the tag relative to the reader. For thereader to tag communication, the coils operating simultaneously shouldhave the same modulation pattern. As a result, the total magnetic fluxwould be modulated according to the reader to tag data. On the otherhand, there is a mutual coupling between any two reader coils operatingsimultaneously. The mutual coupling could be directly through the air orthrough the tag's coil and may cause interference during the tag toreader communication. To prevent this problem, the frequency separationbetween two frequencies assigned to two adjacent coils should be severaltimes higher than the bandwidth of the data transmitted from the tag toreader.

As may be used herein, the terms “substantially” and “approximately”provides an industry-accepted tolerance for its corresponding termand/or relativity between items. Such an industry-accepted toleranceranges from less than one percent to fifty percent and corresponds to,but is not limited to, component values, integrated circuit processvariations, temperature variations, rise and fall times, and/or thermalnoise. Such relativity between items ranges from a difference of a fewpercent to magnitude differences. As may also be used herein, theterm(s) “coupled to” and/or “coupling” and/or includes direct couplingbetween items and/or indirect coupling between items via an interveningitem (e.g., an item includes, but is not limited to, a component, anelement, a circuit, and/or a module) where, for indirect coupling, theintervening item does not modify the information of a signal but mayadjust its current level, voltage level, and/or power level. As mayfurther be used herein, inferred coupling (i.e., where one element iscoupled to another element by inference) includes direct and indirectcoupling between two items in the same manner as “coupled to”. As mayeven further be used herein, the term “operable to” indicates that anitem includes one or more of power connections, input(s), output(s),etc., to perform one or more its corresponding functions and may furtherinclude inferred coupling to one or more other items. As may stillfurther be used herein, the term “associated with”, includes directand/or indirect coupling of separate items and/or one item beingembedded within another item. As may be used herein, the term “comparesfavorably”, indicates that a comparison between two or more items,signals, etc., provides a desired relationship. For example, when thedesired relationship is that signal 1 has a greater magnitude thansignal 2, a favorable comparison may be achieved when the magnitude ofsignal 1 is greater than that of signal 2 or when the magnitude ofsignal 2 is less than that of signal 1.

While the transistors in the above described figure(s) is/are shown asfield effect transistors (FETs), as one of ordinary skill in the artwill appreciate, the transistors may be implemented using any type oftransistor structure including, but not limited to, bipolar, metal oxidesemiconductor field effect transistors (MOSFET), N-well transistors,P-well transistors, enhancement mode, depletion mode, and zero voltagethreshold (VT) transistors.

The present invention has also been described above with the aid ofmethod steps illustrating the performance of specified functions andrelationships thereof. The boundaries and sequence of these functionalbuilding blocks and method steps have been arbitrarily defined hereinfor convenience of description. Alternate boundaries and sequences canbe defined so long as the specified functions and relationships areappropriately performed. Any such alternate boundaries or sequences arethus within the scope and spirit of the claimed invention.

The present invention has been described above with the aid offunctional building blocks illustrating the performance of certainsignificant functions. The boundaries of these functional buildingblocks have been arbitrarily defined for convenience of description.Alternate boundaries could be defined as long as the certain significantfunctions are appropriately performed. Similarly, flow diagram blocksmay also have been arbitrarily defined herein to illustrate certainsignificant functionality. To the extent used, the flow diagram blockboundaries and sequence could have been defined otherwise and stillperform the certain significant functionality. Such alternatedefinitions of both functional building blocks and flow diagram blocksand sequences are thus within the scope and spirit of the claimedinvention. One of average skill in the art will also recognize that thefunctional building blocks, and other illustrative blocks, modules andcomponents herein, can be implemented as illustrated or by discretecomponents, application specific integrated circuits, processorsexecuting appropriate software and the like or any combination thereof.

1. A radio frequency identification (RFID) system comprises: an RFIDreader that includes: an encoding section coupled to convert data intoencoded data; a digital to analog conversion module coupled to convertthe encoded data into an analog encoded signal; a power amplifiercoupled to amplify the analog encoded signal; and a plurality of coilscoupled to generate a plurality of electromagnetic fields from theanalog encoded signal; and an RFID tag that includes: a coil coupled togenerate a current and a recovered signal from at least one of theplurality of electromagnetic fields; a power recovery circuit coupled togenerate a voltage from the current; and a data processing sectioncoupled to process the recovered signal, wherein the data processingsection is powered via the voltage.
 2. The RFID system of claim 1comprises: the RFID reader implemented on a first integrated circuit;and the RFID tag implemented on a second integrated circuit.
 3. The RFIDsystem of claim 1, wherein the RFID reader comprises: a coil controllercoupled to the plurality of coils, wherein the coil controller enablesthe plurality of coils in accordance with an electromagnetic fieldcancellation avoidance scheme.
 4. The RFID system of claim 3, whereinthe magnetic field cancellation avoidance scheme comprises at least oneof: frequency diversity; and time diversity.
 5. The RFID system of claim1, wherein the coil of the RFID tag comprises: a plurality of traces ona plurality of layers of an integrated circuit.
 6. The RFID system ofclaim 1, wherein the coil of the RFID tag comprises: system parametersfor operating as the coil for a near field RFID communication and as anantenna for a far field RFID communication.
 7. A radio frequencyidentification (RFID) reader comprises: an encoding section coupled toconvert data into encoded data; a digital to analog conversion modulecoupled to convert the encoded data into an analog encoded signal; apower amplifier coupled to amplify the analog encoded signal; and aplurality of coils coupled to generate a plurality of electromagneticfields from the analog encoded signal.
 8. The RFID reader of claim 7further comprises: a coil controller coupled to the plurality of coils,wherein the coil controller enables the plurality of coils in accordancewith an electromagnetic field cancellation avoidance scheme.
 9. The RFIDreader of claim 8, wherein the magnetic field cancellation avoidancescheme comprises at least one of: frequency diversity; and timediversity.
 10. A radio frequency identification (RFID) tag comprises: acoil coupled to generate a current and a recovered signal from at leastone of the plurality of electromagnetic fields; a power recovery circuitcoupled to generate a voltage from the current; and a data processingsection coupled to process the recovered signal, wherein the dataprocessing section is powered via the voltage.
 11. The RFID tag of claim10, wherein the coil comprises: a plurality of traces on a plurality oflayers of an integrated circuit.
 12. The RFID tag of claim 10, whereinthe coil comprises: system parameters for operating as the coil for anear field RFID communication and as an antenna for a far field RFIDcommunication.